{"id":"https://openalex.org/A5110068845","orcid":null,"observed_orcids":[],"display_name":"Jos\u00e9 Luis Pino","raw_author_names":["J.L. Pino","Jose Luis Pino","Jos\u00e9 Luis Pino","Pino, Jos\u00e9 Luis"],"full_name":"Jose Luis Pino","works_count":20,"cited_by_count":227,"summary_stats":{"2yr_mean_citedness":0.0,"h_index":7,"i10_index":7},"ids":{"openalex":"https://openalex.org/A5110068845","orcid":null,"observed_orcids":[]},"affiliations":[{"institution":{"id":"https://openalex.org/I138285227","ror":"https://ror.org/02tryst02","display_name":"Agilent Technologies (United States)","country_code":"US","type":"company","lineage":["https://openalex.org/I138285227"]},"years":[2011,2010,2008,2007,2006]},{"institution":{"id":"https://openalex.org/I2803209242","ror":"https://ror.org/00pjdza24","display_name":"University of California System","country_code":"US","type":"education","lineage":["https://openalex.org/I2803209242"]},"years":[1995]},{"institution":{"id":"https://openalex.org/I95457486","ror":"https://ror.org/01an7q238","display_name":"University of California, Berkeley","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]},"years":[1995]}],"last_known_institutions":null,"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","count":14,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","count":13,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","count":6,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","count":5,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":3,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","value":4.51e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","value":3.91e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","value":3.02e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14276","display_name":"Power Systems and Technologies","value":2.38e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","value":2.32e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","score":0.9627900123596191},{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.9201955795288086},{"id":"173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","score":0.7558521032333374},{"id":"118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","score":0.4812445640563965},{"id":"149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","score":0.4451429843902588}],"counts_by_year":[{"year":1993,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":1994,"works_count":2,"oa_works_count":0,"cited_by_count":0},{"year":1995,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":1996,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":1999,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2003,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2006,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2007,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2008,"works_count":3,"oa_works_count":0,"cited_by_count":0},{"year":2010,"works_count":4,"oa_works_count":0,"cited_by_count":0},{"year":2011,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2012,"works_count":1,"oa_works_count":0,"cited_by_count":6},{"year":2013,"works_count":0,"oa_works_count":0,"cited_by_count":7},{"year":2014,"works_count":0,"oa_works_count":0,"cited_by_count":10},{"year":2015,"works_count":0,"oa_works_count":0,"cited_by_count":5},{"year":2016,"works_count":0,"oa_works_count":0,"cited_by_count":4},{"year":2017,"works_count":0,"oa_works_count":0,"cited_by_count":2},{"year":2018,"works_count":0,"oa_works_count":0,"cited_by_count":5},{"year":2020,"works_count":0,"oa_works_count":0,"cited_by_count":2},{"year":2021,"works_count":0,"oa_works_count":0,"cited_by_count":4},{"year":2022,"works_count":0,"oa_works_count":0,"cited_by_count":1},{"year":2024,"works_count":1,"oa_works_count":0,"cited_by_count":1},{"year":2026,"works_count":1,"oa_works_count":1,"cited_by_count":0}],"display_name_alternatives":["J.L. Pino","Jose Luis Pino","Jos\u00e9 Luis Pino","Pino, Jos\u00e9 Luis"],"block_key":"j pino","works_api_url":"https://api.openalex.org/works?filter=author.id:A5110068845","updated_date":"2026-11-07T12:08:38","created_date":"2016-06-24T00:00:00"}
