{"id":"https://openalex.org/A5089972076","orcid":"https://orcid.org/0000-0002-4109-5603","observed_orcids":["https://orcid.org/0000-0002-4109-5603"],"display_name":"Ataollah Saeed Monir","raw_author_names":["Ataollah Saeed Monir","Saeed Monir, Ataollah"],"full_name":"Ataollah Saeed Monir","works_count":6,"cited_by_count":18,"summary_stats":{"2yr_mean_citedness":0.25,"h_index":2,"i10_index":1},"ids":{"openalex":"https://openalex.org/A5089972076","orcid":"https://orcid.org/0000-0002-4109-5603","observed_orcids":["https://orcid.org/0000-0002-4109-5603"]},"affiliations":[{"institution":{"id":"https://openalex.org/I5023651","ror":"https://ror.org/01pxwe438","display_name":"McGill University","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]},"years":[2026,2025,2023]}],"last_known_institutions":[{"id":"https://openalex.org/I5023651","ror":"https://ror.org/01pxwe438","display_name":"McGill University","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","count":6,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":4,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","count":3,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","count":3,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","count":2,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","value":3.6e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","value":3.17e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","value":1.37e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","value":1.08e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","value":4.7e-06,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","score":0.923508882522583},{"id":"121099081","wikidata":"https://www.wikidata.org/wiki/Q665580","display_name":"Trap (plumbing)","score":0.6582276225090027},{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.6500999927520752},{"id":"119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","score":0.41449999809265137},{"id":"154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","score":0.3476000130176544}],"counts_by_year":[{"year":2023,"works_count":2,"oa_works_count":1,"cited_by_count":17},{"year":2024,"works_count":2,"oa_works_count":2,"cited_by_count":0},{"year":2025,"works_count":1,"oa_works_count":0,"cited_by_count":1},{"year":2026,"works_count":1,"oa_works_count":0,"cited_by_count":0}],"display_name_alternatives":["Ataollah Saeed Monir","Saeed Monir, Ataollah"],"block_key":"a monir","works_api_url":"https://api.openalex.org/works?filter=author.id:A5089972076","updated_date":"2026-10-12T12:34:37","created_date":"2025-10-10T00:00:00"}