{"id":"https://openalex.org/A5082049065","orcid":"https://orcid.org/0000-0003-2285-4341","observed_orcids":["https://orcid.org/0000-0003-2285-4341"],"display_name":"Vasilii M. Khvatov","raw_author_names":["V. M. Khvatov","V.M. Khvatov","Vasilii M. Khvatov","Vasilii Mikhailovich Khvatov","Vasiliy Khvatov","Vasiliy M. Khvatov","\u0412. \u041c. \u0425\u0432\u0430\u0442\u043e\u0432","\u0412.\u041c. \u0425\u0432\u0430\u0442\u043e\u0432","\u0412\u0430\u0441\u0438\u043b\u0438\u0439 \u041c\u0438\u0445\u0430\u0439\u043b\u043e\u0432\u0438\u0447 \u0425\u0432\u0430\u0442\u043e\u0432"],"full_name":"Vasilii M. Khvatov","works_count":33,"cited_by_count":106,"summary_stats":{"2yr_mean_citedness":1.0,"h_index":6,"i10_index":2},"ids":{"openalex":"https://openalex.org/A5082049065","orcid":"https://orcid.org/0000-0003-2285-4341","observed_orcids":["https://orcid.org/0000-0003-2285-4341"]},"affiliations":[{"institution":{"id":"https://openalex.org/I1313323035","ror":"https://ror.org/05qrfxd25","display_name":"Russian Academy of Sciences","country_code":"RU","type":"government","lineage":["https://openalex.org/I1313323035"]},"years":[2023,2022,2021,2020,2019,2018]},{"institution":{"id":"https://openalex.org/I204490831","ror":"https://ror.org/02hf6mx60","display_name":"National Research University of Electronic Technology","country_code":"RU","type":"education","lineage":["https://openalex.org/I204490831"]},"years":[2018,2017]},{"institution":{"id":"https://openalex.org/I4210096404","ror":"https://ror.org/00t7t9a43","display_name":"Institute for Design Problems in Microelectronics","country_code":"RU","type":"facility","lineage":["https://openalex.org/I4210096404"]},"years":[2023,2022,2021,2020,2019,2018,2017]}],"last_known_institutions":null,"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","count":33,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","count":30,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","count":14,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","count":12,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":5,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","value":0.0001659,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","value":9.66e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","value":8.19e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","value":8.17e-05,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","value":3.21e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","score":0.8698871731758118},{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.7958707809448242},{"id":"149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","score":0.7277083396911621},{"id":"118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","score":0.6537095904350281},{"id":"76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","score":0.21586200594902039}],"counts_by_year":[{"year":2017,"works_count":1,"oa_works_count":1,"cited_by_count":0},{"year":2018,"works_count":8,"oa_works_count":3,"cited_by_count":5},{"year":2019,"works_count":4,"oa_works_count":0,"cited_by_count":5},{"year":2020,"works_count":3,"oa_works_count":1,"cited_by_count":27},{"year":2021,"works_count":7,"oa_works_count":1,"cited_by_count":28},{"year":2022,"works_count":4,"oa_works_count":1,"cited_by_count":12},{"year":2023,"works_count":3,"oa_works_count":1,"cited_by_count":16},{"year":2024,"works_count":1,"oa_works_count":0,"cited_by_count":3},{"year":2025,"works_count":0,"oa_works_count":0,"cited_by_count":6},{"year":2026,"works_count":0,"oa_works_count":0,"cited_by_count":4}],"display_name_alternatives":["V. M. Khvatov","V.M. Khvatov","Vasilii M. Khvatov","Vasilii Mikhailovich Khvatov","Vasiliy Khvatov","Vasiliy M. Khvatov","\u0412. \u041c. \u0425\u0432\u0430\u0442\u043e\u0432","\u0412.\u041c. \u0425\u0432\u0430\u0442\u043e\u0432","\u0412\u0430\u0441\u0438\u043b\u0438\u0439 \u041c\u0438\u0445\u0430\u0439\u043b\u043e\u0432\u0438\u0447 \u0425\u0432\u0430\u0442\u043e\u0432"],"block_key":"v khvatov","works_api_url":"https://api.openalex.org/works?filter=author.id:A5082049065","awards_count":0,"updated_date":"2026-11-09T14:06:01","created_date":"2018-03-29T00:00:00"}
