{"id":"https://openalex.org/A5036729583","orcid":"https://orcid.org/0000-0002-5811-6386","observed_orcids":["https://orcid.org/0000-0002-5811-6386"],"display_name":"Heiner Giefers","raw_author_names":["Giefers, Heiner","H. Giefers","Heiner Giefers"],"full_name":"Heiner Giefers","works_count":32,"cited_by_count":826,"summary_stats":{"2yr_mean_citedness":4.0,"h_index":11,"i10_index":13},"ids":{"openalex":"https://openalex.org/A5036729583","orcid":"https://orcid.org/0000-0002-5811-6386","observed_orcids":["https://orcid.org/0000-0002-5811-6386"]},"affiliations":[{"institution":{"id":"https://openalex.org/I206945453","ror":"https://ror.org/058kzsd48","display_name":"Paderborn University","country_code":"DE","type":"education","lineage":["https://openalex.org/I206945453"]},"years":[2010,2009,2008,2007,2006]},{"institution":{"id":"https://openalex.org/I3130920692","ror":"https://ror.org/04t5phd24","display_name":"South Westphalia University of Applied Sciences","country_code":"DE","type":"education","lineage":["https://openalex.org/I3130920692"]},"years":[2024]},{"institution":{"id":"https://openalex.org/I4210126328","ror":"https://ror.org/02js37d36","display_name":"IBM Research - Zurich","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]},"years":[2018,2017,2016,2015,2014,2013]}],"last_known_institutions":[{"id":"https://openalex.org/I3130920692","ror":"https://ror.org/04t5phd24","display_name":"South Westphalia University of Applied Sciences","country_code":"DE","type":"education","lineage":["https://openalex.org/I3130920692"]}],"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","count":24,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","count":17,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","count":11,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","count":11,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":5,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","value":7.38e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","value":7.15e-05,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","value":5.25e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","value":3.02e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","value":2.91e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.9253756999969482},{"id":"42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","score":0.8063386678695679},{"id":"173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","score":0.683270275592804},{"id":"149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","score":0.5871774554252625},{"id":"127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","score":0.26249998807907104}],"counts_by_year":[{"year":2006,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2007,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2008,"works_count":2,"oa_works_count":0,"cited_by_count":0},{"year":2009,"works_count":3,"oa_works_count":0,"cited_by_count":0},{"year":2010,"works_count":3,"oa_works_count":0,"cited_by_count":0},{"year":2012,"works_count":1,"oa_works_count":0,"cited_by_count":5},{"year":2013,"works_count":2,"oa_works_count":0,"cited_by_count":7},{"year":2014,"works_count":2,"oa_works_count":0,"cited_by_count":2},{"year":2015,"works_count":6,"oa_works_count":0,"cited_by_count":7},{"year":2016,"works_count":4,"oa_works_count":1,"cited_by_count":21},{"year":2017,"works_count":2,"oa_works_count":1,"cited_by_count":35},{"year":2018,"works_count":4,"oa_works_count":2,"cited_by_count":44},{"year":2019,"works_count":0,"oa_works_count":0,"cited_by_count":82},{"year":2020,"works_count":0,"oa_works_count":0,"cited_by_count":129},{"year":2021,"works_count":0,"oa_works_count":0,"cited_by_count":99},{"year":2022,"works_count":0,"oa_works_count":0,"cited_by_count":100},{"year":2023,"works_count":0,"oa_works_count":0,"cited_by_count":86},{"year":2024,"works_count":1,"oa_works_count":0,"cited_by_count":71},{"year":2025,"works_count":0,"oa_works_count":0,"cited_by_count":68},{"year":2026,"works_count":0,"oa_works_count":0,"cited_by_count":52}],"display_name_alternatives":["Giefers, Heiner","H. Giefers","Heiner Giefers"],"block_key":"h giefers","works_api_url":"https://api.openalex.org/works?filter=author.id:A5036729583","updated_date":"2026-11-01T11:00:13","created_date":"2016-06-24T00:00:00"}
