{"id":"https://openalex.org/A5032008366","orcid":"https://orcid.org/0000-0003-4496-2992","observed_orcids":["https://orcid.org/0000-0003-4496-2992"],"display_name":"Fengyi Mei","raw_author_names":["Fengyi Mei"],"full_name":"Fengyi Mei","works_count":10,"cited_by_count":32,"summary_stats":{"2yr_mean_citedness":0.0,"h_index":3,"i10_index":1},"ids":{"openalex":"https://openalex.org/A5032008366","orcid":"https://orcid.org/0000-0003-4496-2992","observed_orcids":["https://orcid.org/0000-0003-4496-2992"]},"affiliations":[{"institution":{"id":"https://openalex.org/I116953780","ror":"https://ror.org/03rc6as71","display_name":"Tongji University","country_code":"CN","type":"education","lineage":["https://openalex.org/I116953780"]},"years":[2025,2023,2022,2021,2019,2017]}],"last_known_institutions":[{"id":"https://openalex.org/I116953780","ror":"https://ror.org/03rc6as71","display_name":"Tongji University","country_code":"CN","type":"education","lineage":["https://openalex.org/I116953780"]}],"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","count":10,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","count":7,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","count":6,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":5,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","count":1,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","value":5.93e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","value":2.45e-05,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","value":2.15e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","value":1.77e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","value":1.05e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","score":0.894568681716919},{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.7555203437805176},{"id":"119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","score":0.4587678015232086},{"id":"165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","score":0.33557724952697754},{"id":"127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","score":0.3091021180152893}],"counts_by_year":[{"year":2017,"works_count":3,"oa_works_count":0,"cited_by_count":19},{"year":2019,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2021,"works_count":2,"oa_works_count":0,"cited_by_count":12},{"year":2022,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2023,"works_count":2,"oa_works_count":0,"cited_by_count":1},{"year":2025,"works_count":1,"oa_works_count":0,"cited_by_count":0}],"display_name_alternatives":["Fengyi Mei"],"block_key":"f mei","works_api_url":"https://api.openalex.org/works?filter=author.id:A5032008366","updated_date":"2026-10-10T12:59:14","created_date":"2025-10-10T00:00:00"}