{"id":"https://openalex.org/A5004087261","orcid":null,"observed_orcids":[],"display_name":"R. Benmadache","raw_author_names":["R. Benmadache"],"full_name":"R. Benmadache","works_count":1,"cited_by_count":1,"summary_stats":{"2yr_mean_citedness":0.0,"h_index":1,"i10_index":0},"ids":{"openalex":"https://openalex.org/A5004087261","orcid":null,"observed_orcids":[]},"affiliations":[{"institution":{"id":"https://openalex.org/I4210102186","ror":"https://ror.org/01ay87255","display_name":"Centre de D\u00e9veloppement des Technologies Avanc\u00e9es","country_code":"DZ","type":"facility","lineage":["https://openalex.org/I4210102186"]},"years":[2010]}],"last_known_institutions":[{"id":"https://openalex.org/I4210102186","ror":"https://ror.org/01ay87255","display_name":"Centre de D\u00e9veloppement des Technologies Avanc\u00e9es","country_code":"DZ","type":"facility","lineage":["https://openalex.org/I4210102186"]}],"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":1,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","count":1,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","count":1,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","value":6.8e-06,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","value":5e-06,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","value":3.5e-06,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","score":0.7486307621002197},{"id":"145018004","wikidata":"https://www.wikidata.org/wiki/Q4985944","display_name":"Buffer (optical fiber)","score":0.6323471069335938},{"id":"163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","score":0.6072112917900085},{"id":"127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","score":0.20138928294181824},{"id":"121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","score":0.0}],"counts_by_year":[{"year":2010,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2020,"works_count":0,"oa_works_count":0,"cited_by_count":1}],"display_name_alternatives":["R. Benmadache"],"block_key":"r benmadache","works_api_url":"https://api.openalex.org/works?filter=author.id:A5004087261","awards_count":0,"updated_date":"2026-10-27T12:30:23","created_date":"2016-06-24T00:00:00"}
