{"id":"https://openalex.org/A5002438751","orcid":"https://orcid.org/0000-0001-8056-8795","observed_orcids":["https://orcid.org/0000-0001-8056-8795"],"display_name":"Arunkumar P Chavan","raw_author_names":["Arunkumar P Chavan","Arunkumar P. Chavan","Arunkumar Pundalik Chavan"],"full_name":"Arunkumar Pundalik Chavan","works_count":25,"cited_by_count":179,"summary_stats":{"2yr_mean_citedness":1.75,"h_index":7,"i10_index":6},"ids":{"openalex":"https://openalex.org/A5002438751","orcid":"https://orcid.org/0000-0001-8056-8795","observed_orcids":["https://orcid.org/0000-0001-8056-8795"]},"affiliations":[{"institution":{"id":"https://openalex.org/I4389425378","ror":"https://ror.org/041re0e60","display_name":"R.V. College of Engineering","country_code":"IN","type":"education","lineage":["https://openalex.org/I4389425378"]},"years":[2023,2021,2020,2019,2018,2014,2013]}],"last_known_institutions":null,"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","count":11,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":11,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","count":7,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","count":7,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","count":4,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","value":6.42e-05,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","value":3.7e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","value":3.34e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","value":3.23e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","value":2.99e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.8789947032928467},{"id":"149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","score":0.6402673721313477},{"id":"119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","score":0.5898236632347107},{"id":"24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","score":0.5528136491775513},{"id":"127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","score":0.4604746401309967}],"counts_by_year":[{"year":2013,"works_count":2,"oa_works_count":2,"cited_by_count":0},{"year":2014,"works_count":2,"oa_works_count":1,"cited_by_count":3},{"year":2015,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2016,"works_count":0,"oa_works_count":0,"cited_by_count":2},{"year":2017,"works_count":0,"oa_works_count":0,"cited_by_count":4},{"year":2018,"works_count":2,"oa_works_count":0,"cited_by_count":0},{"year":2019,"works_count":4,"oa_works_count":0,"cited_by_count":3},{"year":2020,"works_count":3,"oa_works_count":0,"cited_by_count":12},{"year":2021,"works_count":5,"oa_works_count":0,"cited_by_count":13},{"year":2022,"works_count":0,"oa_works_count":0,"cited_by_count":23},{"year":2023,"works_count":2,"oa_works_count":1,"cited_by_count":35},{"year":2024,"works_count":2,"oa_works_count":1,"cited_by_count":28},{"year":2025,"works_count":1,"oa_works_count":1,"cited_by_count":37},{"year":2026,"works_count":1,"oa_works_count":1,"cited_by_count":13}],"display_name_alternatives":["Arunkumar P Chavan","Arunkumar P. Chavan","Arunkumar Pundalik Chavan"],"block_key":"a chavan","works_api_url":"https://api.openalex.org/works?filter=author.id:A5002438751","updated_date":"2026-11-03T12:34:24","created_date":"2016-06-24T00:00:00"}
