{"id":"https://openalex.org/A5000718123","orcid":"https://orcid.org/0000-0001-7635-3425","observed_orcids":["https://orcid.org/0000-0001-7635-3425"],"display_name":"Kexing Zhou","raw_author_names":["Kexing Zhou","Zhou, Kexing"],"full_name":"Zhou, Kexing","works_count":15,"cited_by_count":138,"summary_stats":{"2yr_mean_citedness":7.888888888888889,"h_index":6,"i10_index":6},"ids":{"openalex":"https://openalex.org/A5000718123","orcid":"https://orcid.org/0000-0001-7635-3425","observed_orcids":["https://orcid.org/0000-0001-7635-3425"]},"affiliations":[{"institution":{"id":"https://openalex.org/I20231570","ror":"https://ror.org/02v51f717","display_name":"Peking University","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]},"years":[2026,2025,2024,2023,2022,2021]}],"last_known_institutions":[{"id":"https://openalex.org/I20231570","ror":"https://ror.org/02v51f717","display_name":"Peking University","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","count":9,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","count":8,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10028","display_name":"Topic Modeling","count":3,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","count":3,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10181","display_name":"Natural Language Processing Techniques","count":3,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T13052","display_name":"Molecular Communication and Nanonetworks","value":4.51e-05,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","value":3.82e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","value":2.76e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","value":1.69e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","value":1e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.8080000281333923},{"id":"26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","score":0.6215999722480774},{"id":"149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","score":0.5671321153640747},{"id":"199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","score":0.5399510860443115},{"id":"2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","score":0.4715999960899353}],"counts_by_year":[{"year":2021,"works_count":1,"oa_works_count":0,"cited_by_count":31},{"year":2022,"works_count":1,"oa_works_count":0,"cited_by_count":18},{"year":2023,"works_count":4,"oa_works_count":4,"cited_by_count":18},{"year":2024,"works_count":3,"oa_works_count":3,"cited_by_count":47},{"year":2025,"works_count":3,"oa_works_count":2,"cited_by_count":20},{"year":2026,"works_count":3,"oa_works_count":3,"cited_by_count":4}],"display_name_alternatives":["Kexing Zhou","Zhou, Kexing"],"block_key":"k zhou","works_api_url":"https://api.openalex.org/works?filter=author.id:A5000718123","updated_date":"2026-10-21T12:28:39","created_date":"2025-10-10T00:00:00"}