{"id":"https://openalex.org/A5000000560","orcid":null,"observed_orcids":[],"display_name":"Sujan Pandey","raw_author_names":["Pandey, Sujan","S. Pandey","Sujan Pandey"],"full_name":"Pandey, Sujan","works_count":25,"cited_by_count":94,"summary_stats":{"2yr_mean_citedness":0.0,"h_index":6,"i10_index":2},"ids":{"openalex":"https://openalex.org/A5000000560","orcid":null,"observed_orcids":[]},"affiliations":[{"institution":{"id":"https://openalex.org/I109147379","ror":"https://ror.org/059be4e97","display_name":"NXP (Netherlands)","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]},"years":[2014,2012,2008]},{"institution":{"id":"https://openalex.org/I180437899","ror":"https://ror.org/04ers2y35","display_name":"University of Bremen","country_code":"DE","type":"education","lineage":["https://openalex.org/I180437899"]},"years":[2007]},{"institution":{"id":"https://openalex.org/I31512782","ror":"https://ror.org/05n911h24","display_name":"Technische Universit\u00e4t Darmstadt","country_code":"DE","type":"education","lineage":["https://openalex.org/I31512782"]},"years":[2007,2006,2005,2004]}],"last_known_institutions":[{"id":"https://openalex.org/I109147379","ror":"https://ror.org/059be4e97","display_name":"NXP (Netherlands)","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]}],"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","count":18,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","count":17,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","count":14,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":8,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10444","display_name":"Context-Aware Activity Recognition Systems","count":3,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","value":0.0001224,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","value":7.03e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","value":5.46e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","value":3.21e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","value":2.81e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.8517930507659912},{"id":"118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","score":0.6720656156539917},{"id":"149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","score":0.5693941712379456},{"id":"127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","score":0.32420000433921814},{"id":"76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","score":0.18700620532035828}],"counts_by_year":[{"year":2003,"works_count":2,"oa_works_count":0,"cited_by_count":0},{"year":2004,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2005,"works_count":4,"oa_works_count":0,"cited_by_count":0},{"year":2006,"works_count":7,"oa_works_count":0,"cited_by_count":0},{"year":2007,"works_count":3,"oa_works_count":0,"cited_by_count":0},{"year":2008,"works_count":5,"oa_works_count":1,"cited_by_count":0},{"year":2012,"works_count":1,"oa_works_count":0,"cited_by_count":3},{"year":2013,"works_count":0,"oa_works_count":0,"cited_by_count":1},{"year":2014,"works_count":1,"oa_works_count":0,"cited_by_count":1},{"year":2015,"works_count":0,"oa_works_count":0,"cited_by_count":5},{"year":2016,"works_count":0,"oa_works_count":0,"cited_by_count":3},{"year":2017,"works_count":0,"oa_works_count":0,"cited_by_count":1},{"year":2018,"works_count":0,"oa_works_count":0,"cited_by_count":2},{"year":2021,"works_count":0,"oa_works_count":0,"cited_by_count":1},{"year":2023,"works_count":0,"oa_works_count":0,"cited_by_count":1}],"display_name_alternatives":["Pandey, Sujan","S. Pandey","Sujan Pandey"],"block_key":"s pandey","works_api_url":"https://api.openalex.org/works?filter=author.id:A5000000560","awards_count":0,"awards_api_url":"https://api.openalex.org/awards?filter=investigators.author.id:A5000000560","updated_date":"2026-11-12T13:17:38","created_date":"2016-06-24T00:00:00"}
